SEOUL, Nov. 12, 2024 — LG Electronics (LG) and Tenstorrent announces an expanded collaboration that builds on their initial chiplet project to develop System-on-Chips (SoCs) and systems for the global market. Through this partnership, LG aims to enhance its design and development capabilities for AI chips tailored to its products and services, aligning with its […]

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SAN JOSE – November 7, 2024 – MIPS, a developer of IP compute cores, announced today the general availability(GA) launch of the MIPS P8700 Series RISC-V Processor. Designed to meet the data movement demands of advanced automotive applications, such as ADAS and Autonomous Vehicles (AVs), the P8700 delivers industry-leading accelerated compute, power efficiency and scalability […]

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Munich, October, 2024 – RISC-V company Codasip announced it has donated its Software Development Kit (SDK) for CHERI to the community-interest organization CHERI Alliance, which makes the SDK freely available for download on GitHub. CHERI (Capability Hardware Enhanced RISC Instructions) is an advanced security technology developed by the University of Cambridge in a joint research […]

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Happy April Fool’s Day! It was as always an interesting week in the world of HPC-AI, this edition of HPC News Bytes includes commentary on: Microsoft and....

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March 26, 2024, SANTA CLARA, Calif. & FRAMINGHAM, Mass.– FPGA technology company Achronix Semiconductor Corporation and Bluespec, Inc., a RISC-V tools and silicon IP company, today announced a family of Linux-capable RISC-V soft processors that are available for the Achronix Speedster7t FPGA family. Marking an industry first, Bluespec’s RISC-V processors now integrate into the Achronix 2D […]

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Santa Clara, Calif., Oct. 11, 2023 –- RISC-V computing company SiFive, Inc. today announced two products designed to address new requirements for high performance compute. The SiFive Performance P870 and SiFive Intelligence X390 offer a new level of low power, compute density, and vector compute capability, and when combined provide the necessary performance boost for […]

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Mark Himelstein, chief technology officer at RISC-V International, joins us to discuss the latest developments with the RISC-V instruction set architecture and its growing community and footprint. Topics include: HPC use cases from sensors to supercomputer, achieving customization without loss of compatibility, AI and its impact on chips and systems, and the question on everyone's mind: when will we see RISC-V in servers and supercomputers? Himelstein also looks at RISC-V’s design wins, including EuroHPC’s backing of R&D to develop HPC hardware and software based on RISC-V. You may also be interested in Shahin's conversation with Mark in August 2020 to hear how things have evolved since then.

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Framingham, Mass. – June 27, 2023 – Bluespec Inc. today announced its new MCUX RISC-V processor designed to ease implementation of custom instructions and the addition of accelerators to FPGAs and ASICs. The MCUX is an extension of Bluespec’s MCU RISC-V processor family, which is targeted at ultra-low resource utilization on FPGAs. Bluespec said the […]

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A UK chip startup, VyperCore, says it has come up with a memory management scheme that does a software layer end-around and delivers as much as a 10x throughput improvement for high performance, general-purpose workloads without code modification. The company’s core insight, as described in a recent EE Times article: move “away from the processor’s […]

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Beaverton, Oregon — March 14, 2023 — SiFive has joined the OpenMP Architecture Review Board (ARB), a group of hardware vendors, software vendors and research organizations, in creating the standard for the OpenMP shared-memory parallel programming model. SiFive is a RISC-V-based high-performance embedded systems platform company, delivering high-performance compute density for modern workloads. SiFive solutions are […]

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